Shanghai Anlogic Infotech · 上海安路信息科技股份有限公司

State-Backed Design House

The most explicit domestic attempt to reach Xilinx/Altera-scale FPGA density (4M+ LUT chiplet program) — while still small and loss-making (FY2025 revenue …
Published

October 11, 2026

Chinese name: 上海安路信息科技股份有限公司 (Ānlù Kējì)

TipWhy This Matters

The most explicit domestic attempt to reach Xilinx/Altera-scale FPGA density (4M+ LUT chiplet program) — while still small and loss-making (FY2025 revenue ¥5.20亿, net -¥2.72亿). The turnaround signal is H1 2026: revenue ¥4.32亿 (+93.3%) with the net loss narrowed 47.7% to ¥74.5 million (Q2 alone +104.7% YoY, a fifth straight quarter of sequential growth), on ‘multi-fold’ data-center sales as FPGAs ride the AI-emulation wave; the ¥12.6亿 placement closed at the full cap in September 2026 to fund exactly that chiplet program.

What does this firm design?

Reconfigurable logic (FPGA/FPSoC) for telecom, industrial, automotive (cockpit/LiDAR) and compute; FPGA design software.

Key Facts

Category State-Backed Design House
Founded 2011
Location Shanghai, Shanghai Municipality
Product Focus FPGA/FPSoC (ELF, Eagle, Phoenix/Fenghuang lines) + in-house FPGA EDA toolchain
Node Sophistication 55nm→domestic-28nm FPGA in volume→first advanced-node (FinFET) high-performance FPGA deliveries 2025; ¥1.262bn placement completed September 2026 (at the full cap, ¥25.49/share, 22 investors) funding a >4KK-LUT chiplet FPGA (2.5D multi-die) whose project kicked off June 2026, sampling 2026, volume 2027–28
Entity List No
Last Verified Newest source dated 11 Sep 2026 (3 sources)

Design Score

3.5/5

Sources

Back to Design Tracker